Rockwell Automation 1785 PLC-5 User Manual Page 95

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Switchover Considerations
Chapter 6
6-10
Because the secondary processors program scan and block transfer
execution are totally asynchronous, it is possible for the secondary
processor to operate on partial data structures. If the secondary processor
is executing instructions that operate on any of the multi-word structures
that are listed above, the following sequence of events may occur:
1. The 1785-BCM transfers the first word of a multi-word structure to
the secondary processor. A partial data structure temporarily exists in
the secondary processor.
2. The secondary processor operates on this partial structure and derives
invalid results.
3. The partial data structure and the invalid result of the operation exist
in the secondary processor until the remaining portion of the structure
is transferred. The secondary processor re-executes the operation on
the next program scan and overwrites the invalid result with the
correct result.
4. If the primary processor were to go de-active before the invalid result
of the processor operation was corrected, then the invalid results
would persist in the secondary processor for an indeterminate period
of time.
Important: To prevent partial structures from occurring in the secondary
processor, you must group related data words or multi-word elements (i.e.
floating point) so that they fit in one block.
Some of the PLC-5 processor instructions operate on data structures with
less than 16-bit words. These other data structures are:
bits
bytes
bit fields
Instructions such as bit-shift and bit-distributor instructions use these other
data structures. When using these instructions, you must be aware that the
data table will contain invalid data until the processor executes a series of
instructions. For example, if you are shifting four bits of BCD data
through several words bit by bit, the data table will contain invalid data
until each shift is complete.
Data Integrity
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